Single clock process design based on RISC-V ISA

₹600-1500 INR

Lezárt

Kiadva ekkor:

12 hónappal ezelőtt

₹600-1500 INR

Teljesítéskor fizetve

I am looking for a freelancer to design a single clock process based on RISC-V ISA using Verilog. The clock process design must have the following specific features and functionalities: The project only requires the implementation of the base RISC-V ISA, without any specific extensions. The ideal freelancer must be skilled and experienced in Verilog and have a deep understanding of RISC-V ISA. Additionally, I would prefer someone who has previously worked on similar projects and can provide examples of their work.

Electrical Engineering

Projektazonosító: 36520046

A projektről

2 ajánlat

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Aktiválva: 10 hónappal ezelőtt

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@hadyghata

Dear Sir, I have been teaching the RISC-V ISA to students for four years now at the AUC. The course I reached contain a very similar project that require the students to implement the RV32I ( Base Integer Instruction Set ), I also teaches them how to make it pipelined and how to handle the hazardous. I sure that I'm the perfect candidate for this project. Kind regards Eng\ Hady

₹600 INR 6 napon belül