We have experienced in Synopsys EDA tools and we have access to the licensed tools to carry out the task.
Relevant Skills and Experience
Verilog, VHDL,
Design Compiler
Primetime
VCS
Formality
RTL Desing and Verification
FPGA - Xilinx, Altera
Proposed Milestones
$666 USD - Deliverables Will be given based on the project
Additional Services Offered
$200 USD - Custom Board design
$100 USD - ATE , Test JIG PC tools creation for demo