Design of MIPS Datapath components Using Logisim

Lezárva Kiadva: 6 évvel ezelőtt Kiszállításkor fizetve
Lezárva Kiszállításkor fizetve

Course: Computer Organization and Architecture

Project: Design of MIPS Datapath components Using Logisim

Objectives

After completing this project you will:

· Design a 32x 32 bit register file

· Design a 32 bit arithmetic and logic unit (ALU)

Register File

The register file consists of 32 x 32-bit registers and has the following interface as shown

in Figure 1:

_ BusA and BusB: 32-bit output busses for reading 2 registers

_ BusW: 32-bit input bus for writing a register when RegWrite is 1

_ RA selects register to be read on BusA

_ RB selects register to be read on BusB

_ RW selects the register to be written

Áramkör dizájn Elektronika Mérnöki munka FPGA Verilog / VHDL

Projektazonosító: #15784944

A projektről

8 ajánlat Távolról teljesíthető projekt Utoljára aktív: 6 évvel ezelőtt

8 szabadúszó tett átlagosan 50$ összegű árajánlatot erre a munkára

ahmedmohamed85

A proposal has not yet been provided

$77 USD 3 napon belül
(410 vélemény)
7.8
zarnescugeorge

Hello! I thought logisim at a big university for 6 years and also digital logic. I can help you asap! Send me a message! Have a great day!

$55 USD 2 napon belül
(99 vélemény)
7.0
raulbehl

Hello! Please check my reviews and profile to know more about me and my work. I’ve implemented such Simulators in the past and Hence I should be able to help you out. Thank you!

$55 USD 3 napon belül
(83 vélemény)
6.1
xaainulabideen

A proposal has not yet been provided

$30 USD 3 napon belül
(62 vélemény)
5.9
hungfreelancer

It's an easy project for me. I will complete it with the highest quality for you. Relevant Skills and Experience Have 10 years of experience in Asic design and verification. Worked on MIPS mcu design and verification. Továbbiak

$20 USD 2 napon belül
(5 vélemény)
3.9
thasleemreyasm

I have well experienced in doing such kind of jobs.................................... Relevant Skills and Experience verilog/vhdl Proposed Milestones $30 USD - i will do my level best

$30 USD 2 napon belül
(4 vélemény)
2.5
rishabh143

I have worked on 32-bit pipeline processor. so this task will be easy for me Relevant Skills and Experience logisim is easy to use for desinging your task Proposed Milestones $35 USD - 32-bit pipeline processor Sta Továbbiak

$35 USD 2 napon belül
(0 vélemény)
0.0